Capacitors are employed in digital and analog devices for a variety of purposes, including storing electrical charge, filtering, blocking DC voltage levels, and stabilizing power supplies (e.g., decoupling switching noise from DC supplies). Typical capacitors used in semiconductor devices may have the structure of a metal oxide semiconductor (MOS) type, a P-N junction type, a polysilicon-insulator-polysilicon (PIP) type, a metal-insulator-metal (MIM) type, etc., wherein the type of capacitor employed typically depends on the application (e.g., analog or digital) and desired response characteristics of the device.
PIP capacitors suffer from capacitance variations caused by the doping characteristics of the polysilicon capacitor electrode plates, and as such, these devices exhibit fairly large changes in the capacitance as a function of applied voltage. Hence these devices have a large voltage coefficient of capacitance (VCC), typically measured in parts per million per volt (ppm/V). In addition, parasitic effects are seen in MOS type transistors where the capacitor is located proximate the substrate. MIM type capacitors may be advantageously fabricated in upper interconnect layers of a semiconductor device wafer to mitigate such parasitic effects. MIM capacitors are further desirable, since the electrode plates are fabricated from conductive metal materials, whereby the polysilicon doping issues and polysilicon depletion associated with PIP capacitors are avoided.
Voltage dependent capacitance effects are generally more detrimental in analog capacitors than in decoupling capacitors. Thus, in semiconductor devices having both analog and digital circuitry (e.g., sometimes referred to as mixed-signal devices), some capacitors have different design performance criteria than others. In this regard, mixed-signal devices generally employ decoupling capacitance to reduce power supply transients associated with switching transistors, as well as analog capacitors for filtering and other types of analog circuits.
Decoupling capacitors (e.g., digital capacitors) require high capacitance density (e.g., measured in fF/um2) in order to minimize the amount of device area devoted to decoupling. In some cases, capacitance densities of 10 fF/um2 or more are desired to minimize the die area occupied by decoupling capacitors, particularly as higher clock speeds (e.g., transistor switching speeds) dictate increased decoupling capacitance requirements. However, decoupling capacitors generally are not as sensitive to the dependence of capacitance on voltage as are analog capacitors. For instance, a decoupling capacitor connected between a power supply rail and ground will not see large fluctuations in applied voltage during normal operations (e.g., apart from fast transient switching noise in digital circuits). Thus, for a decoupling capacitor designed to decouple high frequency noise from a 3 V DC supply, the difference in capacitance at 1 V is relatively unimportant.
Conversely, analog circuits do not demand such high capacitance densities, wherein densities of around 3 fF/um2 or less may be used. However, analog circuits are much less tolerant of capacitance variations during operation than are digital circuits. For example, if the impedance of the capacitor is not reasonably predictable or consistent across the range of expected applied voltages, the circuit performance could be different for different applied voltages, and consequently, the performance of the analog circuit may be unsatisfactory. Thus, whereas decoupling capacitors can be successfully employed with relatively large fluctuations in capacitance with changes in applied voltage, analog capacitors are typically designed to have VCC specifications in a range of about 300 ppm/V or less.
These divergent capacitor design goals often lead to separate processing operations to form digital (e.g., decoupling) and analog capacitors in the manufacture of semiconductor devices, particularly in mixed-signal type devices. Separate capacitor dielectrics have conventionally been employed since the VCC coefficients typically get smaller as dielectric film thickness is increased, while the capacitance density is reduced for thicker dielectrics. Some processes fabricate analog and decoupling MIM type capacitors in separate interconnect levels or layers, while others form different dielectric layers in the same interconnect level for the analog and digital MIM capacitors. In either case, multiple masks and process steps are required to separately form the decoupling and analog capacitors. It is a continuing goal to reduce or streamline the number of such processing steps, so as to increase product throughput and reduce product cost in the manufacture of semiconductor devices. Accordingly, there is a need for capacitor structures and processing methods by which analog and decoupling capacitors can be fabricated to accommodate the different performance requirements with respect to VCC, leakage current, and capacitance density, and which reduce the number of processing steps required for capacitor fabrication.